Concurrent programming for shared-memory multiprocessors can include the ability for multiple threads, which can execute on multiple processors, multiple processor cores, or other classes of parallelism, to access shared variables. The shared-memory model is a commonly used method of interthread communication. A major issue in the use of a shared-memory model is controlling access to shared state. Without control over access to shared state, undesirable conditions such as races can occur.
Locks are a common solution to the problem of controlling concurrent access to shared state. A lock operates by serializing modifications to shared state and thus ensures that at most one thread is modifying a given piece of state at any time. This serialization can be used to preserve consistent views of the system state across cooperating threads.
A common implementation of a shared-memory model is a cache based shared memory system, which includes at least two processors each connected to a shared memory through a cache corresponding with the processor. In order for a processor to inspect a lock on a variable in the shared memory, that variable is moved to the inspecting processor according to a cache coherence protocol used in the hardware. The hardware typically uses a greedy algorithm to determine when the variable should be moved. Upon a “memory load request” instruction, the greedy algorithm will move the variable from its current processor and give the data to the processor issuing the memory load request. The greedy algorithm moves the data regardless of whether the original processor is still using the data.
Significant performance loss occurs in such cache based shared memory systems due to inefficient movement of data between processors. There is latency in propagating state change information through the system following a release operation, and there is latency to move the buffer following an acquire operation. These latencies are present for both consumer and producer operations. Accordingly, there remain opportunities for improvement in management of ownership control and data movement in shared-memory systems.